In the manufacture of semiconductors, wafers are subjected to processes by which layers of materials are applied and etched by various sequences of physical, chemical, photographic and other process steps to produce stacks of layers defining a large number of electrical devices and circuits on each of the dies on the wafer. The individual devices or circuits are eventually separated and encased to form chips and other modules for use in electronic equipment. Series of processes performed on individual wafers are usually performed on more than one machine which may be located at one or more facilities or locations. After all of the processes in the manufacture of semiconductors are performed on a wafer, or after any series of processes is performed in one machine or at one location, wafers and the devices on the wafer are subjected to a series of tests to determine the existence of defects, if any, and whether the device conforms to production standards. The tests result in a determination of whether the wafer is to be passed on to the next process sequence or packaged and shipped to another location for further processing or incorporation into marketable components or products.
The testing of semiconductor wafers involves a number of characteristically different test procedures. In certain procedures, optical techniques are used to inspect the wafer for defects of a nature that such optical techniques can reveal. Such visual or optical inspections have typically involved the use of specialized test machines. Wafers have been loaded into such machines from standard cassettes that might include, for example, a stack of 25 wafers spaced on a rack within the cassette. A testing machine unloads the wafers individually from such a cassette, subjects each wafer to the optical inspection, and then returns the wafer to the cassette or loads it into a different cassette.
The testing of semiconductor wafers further involves testing by other than optical techniques, such as by the measuring of electrical resistances or other properties among points on the devices on a wafer by a multi-electrode probe that usually makes electrical contact with each of a plurality of points in electrical contact with the terminals of the device. Such electrical testing also usually involves the use of specialized test machines that differ from those by which the optical tests are performed. As with the optical test devices, wafers have been loaded into such machines from the cassettes, with a wafer handler in the machine unloading the wafers individually from the cassette. The machine subjects each wafer to the electrical test, and then returns the wafer to the cassette or loads it into a different cassette. Often, more than one test of an electrical nature is performed on a wafer, and each test is typically carried out by a testing machine dedicated to the performance of the particular test, which unloads and reloads wafers from and to a cassette before and after the testing.
The testing and inspection of semiconductor wafers involves a series of such tests, including more than one visual test and more than one test that is electrical in nature. The testing sequence usually further involves the inking or marking of devices on the wafers in response to the results of the tests as well as a baking of the wafer to cure the marking ink. The test processes are followed by the sorting of the wafers and the packaging of the tested wafers for transport to next manufacturing facility. If the last step in wafer processing has been performed, the next process performed on the wafers may be the slicing or separating of the individual devices from the wafer and the sorting of the good from the defective devices.
The sequence of tests, from the performance of the first test to the packaging of the wafers for further processing, has required the manual handling of the cassettes or the manual control of the transfer of the cassettes from one testing station to another. Such handling introduces the opportunity for damage to the wafers due to mishandling of the cassettes or due to errors in the movement of the cassettes among the stations. In addition, the timing of the transfer stages between various tests of the testing sequence has been dependent on the readiness of an operator to carry out the manual transfer operation, which is a source of delays of the testing process and the idleness of testing machinery whenever the operator is otherwise busy. Correlation of data from a sequence of independent test procedures that are manually linked by the actions of an operator is a source of potential delay and of potential error in the relation of the test results to process control decisions. Such reliance on the operator to move and coordinate the wafers to, through and from the testing processes requires substantial operator time.
The layout of equipment needed to carry out a variety of independent testing procedures has called for sufficient floor space to hold testing machines which each have loading and unloading stations. In addition, wafer and cassette holding stations, operator space and maintenance space must be provided to accommodate a number of independent stations.
There is a need in the inspection and testing of semiconductor wafers during and after the performance of various sequences of manufacturing processes for an integrated overall testing method and apparatus that eliminates unnecessary and unreliable steps in the process, and reduces time, space and cost.